- Vector demonstrated how architecture design and timing analysis can be integrated within a model-based automotive development workflow.
- The demo used the vCANdrive SDV demonstrator to evaluate how design decisions affect end-to-end communication behavior.
At the Automotive Ethernet Congress, the Vector Informatik GmbH PREEvision RTaW Pegase demo illustrated how modern vehicle electronics development can combine architecture design and timing verification within a unified model-based process. The presentation highlighted the growing importance of integrating system modeling with communication performance evaluation as vehicles transition toward software-defined architectures and increasingly complex electronic networks.
Model-Based Workflow for E/E Architecture Development
The demonstration showed how engineers can design electronic and electrical architectures using PREEvision while simultaneously analyzing communication timing with RTaW Pegase. The workflow was built around the vCANdrive vehicle model, which serves as a software-defined vehicle demonstrator developed by the Germany-based company. By connecting system design with analytical validation, developers can understand how architectural choices influence end-to-end communication performance across vehicle networks.
Evaluating Communication Behavior in SDV Architectures
Using this integrated setup, architectural configurations created in the design environment are directly evaluated through timing simulations. This allows developers to examine network latency, communication scheduling, and system behavior early in the development cycle. Such a model-driven approach supports faster validation of complex E/E architectures and helps ensure reliable communication performance as automotive platforms evolve toward increasingly software-centric vehicle systems.
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