- AMD Spartan UltraScale+ XASU35P FPGA targets ADAS sensors.
- 12x12 mm packaging supports compact camera and LiDAR designs.
- MIPI D-PHY reaches lane rates up to 2.5 Gb/s.
AMD Adds Spartan UltraScale+ XASU35P FPGA for ADAS
On September 29, AMD introduced the Spartan UltraScale+ XASU35P FPGA as the latest addition to its Automotive (XA) family. The automotive-qualified device is optimized for advanced driver assistance system sensor applications, with a compact 12x12 mm package intended for space-constrained camera vision and LiDAR designs. The device is also available in a chipscale package, providing increased routing and signal density for I/Os, improved solder joint reliability, and enhanced electrical performance. The new FPGA is positioned for automotive sensing applications where compact packaging and high-speed signal connectivity are important design requirements.
Compact Packaging Supports Camera Vision and LiDAR
The Spartan UltraScale+ XASU35P FPGA is offered in a 12x12 mm package that provides a small footprint for ADAS sensor applications. Its compact form factor is particularly suited to camera vision and LiDAR applications, where available board space can be limited by sensor and vehicle packaging requirements. The chipscale package option is designed to increase routing and signal density for I/Os while also improving solder joint reliability and electrical performance. These packaging options give automotive system designers alternatives for integrating the FPGA into sensor architectures while maintaining the device's focus on compact automotive applications.
Automotive Qualification and Functional Safety Support
Spartan UltraScale+ XA devices are already in production and shipping, according to AMD. The devices provide optimized I/O in a small form factor and are designed to meet applicable automotive qualification and functional-safety requirements described by ISO 26262 and AEC-Q100 temperature grades. These requirements are relevant to automotive electronic systems that must operate under defined qualification and safety expectations. For ADAS sensor applications, the combination of automotive qualification, compact packaging, and optimized I/O is intended to support integration into vehicle electronics without changing the device's stated technical requirements or capabilities.
MIPI D-PHY Enables Up to 2.5 Gb/s Lane Rates
The Spartan UltraScale+ XASU35P FPGA supports MIPI D-PHY with a lane rate of up to 2.5 Gb/s. AMD states that this data rate meets the necessary requirement for point cloud generation. The MIPI D-PHY capability adds high-speed connectivity relevant to sensor data processing, particularly for automotive applications involving camera and LiDAR inputs. Combined with the small package options, automotive qualification, and optimized I/O, the device is designed around the connectivity and integration requirements identified for ADAS sensor applications. The stated 2.5 Gb/s lane rate is a key specification of the new automotive FPGA.
Industry Impact & Outlook
The Spartan UltraScale+ XASU35P FPGA strengthens AMD's automotive FPGA offering for compact ADAS sensor applications by combining automotive qualification, small package options, and MIPI D-PHY connectivity. Its production and shipping status means the device is available for current automotive development and integration activity, while the 12x12 mm package and chipscale option address physical and electrical design considerations for camera vision and LiDAR systems. The support for ISO 26262 and AEC-Q100 requirements also aligns the device with automotive qualification and functional-safety expectations. Further adoption will depend on how vehicle and sensor developers integrate the FPGA into their specific architectures.
Frequently Asked Questions
What is the AMD Spartan UltraScale+ XASU35P FPGA?
The AMD Spartan UltraScale+ XASU35P FPGA is an automotive-qualified device optimized for ADAS sensor applications, including camera vision and LiDAR. It is part of AMD's Automotive (XA) family and is available in a compact 12x12 mm package as well as a chipscale package. The device supports MIPI D-PHY with lane rates of up to 2.5 Gb/s for applications requiring the stated data rate for point cloud generation. Spartan UltraScale+ XA devices are already in production and shipping, and are designed to meet applicable ISO 26262 and AEC-Q100 requirements.
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