onsemi Unveils Embedded Power Platform for AI, EVs

onsemi Unveils Embedded Power Platform for AI, EVs

On September 16, Scottsdale, Arizona-based onsemi unveiled the onsemi Embedded Power Platform, a new architecture that uses the silicon wafer itself as the foundation of the package. The approach is designed to create a highly integrated power-system architecture by bringing semiconductor devices and packaging functions together at the wafer level. The platform is intended to support demanding applications across automotive and artificial intelligence markets, with an emphasis on power density, system performance, and development speed. By making the wafer part of the package foundation, the architecture changes how multiple power technologies can be integrated within a single system.

Integrated Silicon, SiC and GaN Architecture

The platform enables silicon, silicon carbide (SiC), and gallium nitride (GaN) technologies to be integrated and interconnected within a highly integrated wafer-level architecture. Multiple devices, including field-effect transistors, drivers, and controllers, can be embedded together and co-optimized in one package. This approach allows electrical, thermal, and mechanical considerations to be addressed collectively rather than treated as separate design requirements. For customers developing advanced power systems, the architecture is intended to provide a more integrated foundation for managing the interactions between different semiconductor technologies and supporting components within a single package.

Scalable Platform Targets Higher Power Density

Designed as a scalable platform, the architecture brings electrical, mechanical, and thermal design considerations together from the beginning of development. According to onsemi, this integrated approach is intended to help customers achieve higher power density, improve overall system performance, and accelerate development cycles. These capabilities are relevant to applications in artificial intelligence, vehicle electrification, and autonomous systems, where power-management requirements can place significant demands on system architecture. The platform therefore combines packaging and semiconductor integration considerations at an early stage, with the goal of supporting more compact and highly integrated power-system designs.

12-Inch Wafer Manufacturing Supports EPP

The architecture leverages onsemi's standard 12-inch silicon wafer manufacturing capabilities, allowing key integration processes to be brought into the controlled environment of the semiconductor fabrication facility. Using established wafer manufacturing capabilities provides the foundation for the platform's production approach while maintaining precision and process control during integration. The use of wafer-level manufacturing is also central to the architecture because the silicon wafer serves as the package foundation itself. This manufacturing strategy connects the packaging concept directly with semiconductor fabrication processes rather than treating the package solely as a downstream assembly stage.

Sampling Planned for Automotive and AI Applications

The platform is expected to begin sampling in 2026 with strategic customers and ecosystem participants across automotive and artificial intelligence applications. The planned sampling phase will provide an opportunity for customers and ecosystem participants to evaluate the architecture in relevant power-system designs before broader adoption. Automotive applications are expected to be among the areas of focus, alongside AI systems that require increasingly capable power architectures. The initial customer and ecosystem engagement will therefore be important for assessing how the integrated wafer-level approach performs across different application requirements and system designs.

Industry Impact & Outlook

The development extends semiconductor integration into the package architecture itself, potentially changing how power devices, control components, and different semiconductor materials are combined in advanced systems. For automotive and AI developers, a platform that coordinates electrical, thermal, and mechanical design from the outset could influence future approaches to power-density and system-integration challenges. The use of established 12-inch wafer manufacturing also connects the architecture with an existing fabrication capability. The next significant step is expected to be the planned 2026 sampling phase, when strategic customers and ecosystem participants can evaluate the platform in automotive and AI applications and determine its practical suitability for their designs.

Frequently Asked Questions

What is onsemi's Embedded Power Platform?
The platform is a wafer-level power architecture that uses the silicon wafer as the package foundation and integrates multiple semiconductor technologies and devices. It enables silicon, silicon carbide, and gallium nitride technologies to be interconnected while allowing FETs, drivers, and controllers to be embedded and co-optimized in a single package. The architecture combines electrical, thermal, and mechanical design considerations from the beginning. onsemi expects the platform to support applications including automotive electrification, autonomous systems, and artificial intelligence, with sampling planned for strategic customers and ecosystem participants during 2026.